Backhaul Analyzer Measurement Guide : T1/FT1 Analyzer (Option 51 or 54)   : T1 Pattern/Loop Screen
 
T1 Pattern/Loop Screen
Access the test pattern screen by pressing the Pattern/Loop key, which includes 12 defined patterns and up to six user‑defined patterns. The user‑defined patterns can be created by pressing the Set User Pattern submenu key. Refer to Set User Pattern.
The available patterns are: QRSS, PRBS‑9(511), PRBS‑11(2047), PRBS‑15, PRBS‑20, PRBS‑23, All Ones, All Zeros, T1 Daly, 1 in 8, 2 in 8, 3 in 24, or one of six user‑defined patterns (labeled User Pattern 1 through User Pattern 6). The defined patterns are listed in Table: Defined Test Patterns.
Inverse patterns can be used. Loop codes can be selected and used as loop up or loop down.
Submenu keys for the Pattern/Loop Menu are described in Select Pattern. For a list of test pattern descriptions, refer to Table: Defined Test Patterns .
Defined Test Patterns
Pattern
Description
Application
QRSS
1,048,575 bit pattern
Simulates live traffic including both high and low-density sequences
1 IN 8
Eight bit pattern of a 1 and 7 zeros
Checks clock recovery on circuits optioned for B8ZS
2 IN 8
Eight bit pattern of 2 ones and 6 zeros
Used to determine correct optioning of AMI or B8ZS line coding
3 IN 24
24 bit pattern with 3 ones and 15 consecutive zeros. 12.5% ones density
Stresses AMI optioned circuits for minimum ones density and maximum consecutive zeros performance. Forces zero substitutions in B8ZS optioned circuits
ALL ONES
All ones sent as payload in a framed sequence
Stresses ability of circuit to operate under maximum power conditions
ALL ZEROS
All zeros sent as payload in a framed sequence
Checks for B8ZS optioning. Circuit will drop if optioned for AMI
T1-DALY
Framed 55 octet sequence which changes rapidly from high to low density
Stresses timing recovery and ability of automatic line build out and equalizer circuits to respond quickly to changing ones density
PRBS-9 (511)
511 bit pseudo‑random pattern
Test sub‑rate DDS circuits operating below 56 kb/s
PRBS-11 (2047)
2,047 bit pseudo‑random pattern
Test 56 kb/s DDS circuits
PRBS-15
32,767 bit pseudo‑random pattern. Generates up to 14 consecutive zeros and 15 consecutive ones
Tests to CCITT Recommendations O.151 and G.703. Provides maximum number of zeros for testing non‑B8ZS circuits
PRBS-20
1,048,575 bit pseudo‑random pattern. Generates up to 19 consecutive zeros and 20 consecutive ones
Used to test synchronous T1 circuits only
PRBS-23
8,388,607 bit pseudo‑random pattern. Generates up to 22 consecutive zeros and 23 consecutive ones
Used to test synchronous T1 circuits