T3 Pattern/Loop Menu

The Pattern/Loop menu includes 12 defined patterns (refer to Table: “Pattern Descriptions and Applications”). Up to 6 user‑defined patterns can be created by pressing the Set User Pattern submenu key.

Use this function to select a pattern, to set and select a user pattern, to use an inverse pattern, to select a loop code, or to loop up or loop down.

Submenu keys for the Pattern/Loop Menu are described in “T3 Pattern/Loop Menu”.

Pattern Descriptions and Applications

Pattern	Description	Application
QRSS	1,048,575 bit pattern	Simulates live traffic including both high and low-density sequences
1 IN 8	Eight bit pattern of a 1 and 7 zeros	Checks clock recovery on circuits optioned for B3ZS
2 IN 8	Eight bit pattern of two ones and 6 zeros	Used to determine correct optioning of AMI or B3ZS line coding
3 IN 24	24 bit pattern with 3 ones and 15 consecutive zeros. 12.5% ones density	Stresses AMI optioned circuits for minimum ones density and maximum consecutive zeros performance. Forces zero substitutions in B3ZS optioned circuits
ALL ONES	All ones sent as payload in a framed sequence	Stresses ability of circuit to operate under maximum power conditions
ALL ZEROS	All zeros sent as payload in a framed sequence	Checks for B3ZS optioning. Circuit will drop if optioned for AMI
1010	Alternating 1s and 0s	Stresses ability of circuit to operate under 50% power conditions
PRBS-9 (511)	511 bit pseudo-random pattern	Test sub-rate DDS circuits operating below 56 kb/s
PRBS-11 (2047)	2047 bit pseudo-random pattern	Test 56 kb/s DDS circuits
PRBS-15	32,767 bit pseudo-random pattern. Generates up to 14 consecutive zeros and 15 consecutive ones	Tests to CCITT Recommendations O.151 and G.703. Provides maximum number of zeros for testing non‑B8ZS circuits
PRBS-20	1,048,575 bit pseudo-random pattern Generates up to 19 consecutive zeros and 20 consecutive ones	Used to test synchronous T1 circuits only
PRBS-23	8,388,607 bit pseudo-random pattern Generates up to 22 consecutive zeros and 23 consecutive ones	Used to test synchronous T1 and T3 circuits

 

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