Table: SRQ and Status Byte Commands (1 of 2) lists the Service Request (SRQ) and Status Byte command mnemonic codes. These commands enable the signal generator to request service from the controller when certain, predefined conditions exist.
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SRQ Generation
The signal generator can generate GPIB service requests (SRQs) to report instrument status and syntax errors to the controller. The signal generator will generate an SRQ if:
1. The SRQ generation function has been enabled using the SQ1 command and,
2. One (or more) of the status reporting functions is true and,
3. The primary status byte bit associated with the true status reporting function has been enabled.
Bits in the primary status byte can be enabled by either of two methods. The first uses the FB1/FB0, UL1/UL0, LE1/LE0, and SE1/SE0 commands.individually enable or disable each bit. The second method uses a single 8-bit status byte mask (MB0) to enable any or all of the primary status byte bits.
Primary and Extended Status Bytes
Note
All status byte bits are latched except for those indicated with the “*”. Once set, an OES or OSB command must be received before the condition will be reset. The primary status byte bit 6 (SRQ) is cleared by a serial poll only.
Primary Status Byte
Extended Status Byte 2
SRQ
Syntax Error
Parameter Range Error
Lock Error
RF Unleveled
Not Used
Extended Status Byte 1
Bit 7 (128)
Bit 6 (64)
Bit 5 (32)
Bit 4 (16)
Bit 3 (8)
Bit 2 (4)
Bit 1 (2)
Bit 0 (1)
Primary status byte bit 0 is set whenever one of the status conditions reported by an extended status byte 1 is true and the associated status bit is enabled. This bit is cleared when the controller sends the OES command.
Primary status byte bit 7 is set whenever one of the status conditions reported by an extended status byte 2 is true and the associated status bit is enabled. This bit is cleared when the controller sends the OES command.
Primary status byte bit 6 (SRQ) is not maskable. This bit is enabled by the SQ1 command and cleared by a serial poll.
Extended Status Byte 1
Not Used
Not Used
Not Used
Not Used
RF* Locked
Not Used
Not Used
Not Used
Bit 7 (128)
Bit 6 (64)
Bit 5 (32)
Bit 4 (16)
Bit 3 (8)
Bit 2 (4)
Bit 1 (2)
Bit 0 (1)
Extended status byte 1 bits are enabled by the extended status byte 1 mask command, MB1.
Extended status byte 1 bit 3 (RF Locked): the setting of this bit is blocked or unblocked by the commands, LS0 and LS1.
Extended Status Byte 2
Not Used
Not Used
Not Used
RF* Unlocked
Not Used
Not Used
Not Used
Not Used
Bit 7 (128)
Bit 6 (64)
Bit 5 (32)
Bit 4 (16)
Bit 3 (8)
Bit 2 (4)
Bit 1 (2)
Bit 0 (1)
Extended status byte 2 bits are enabled by the extended status byte 2 mask command, MB2.
The setting of extended status byte 2 bit 4 (RF Unlocked) is blocked or unblocked by the commands, EL0 and EL1.
SRQ and Status Byte Commands (1 of 2)
Mnemonic Code
Function
CSB
Clears all Native status bytes.
EL0
Inhibits the RF Unlocked bit update. ESB2 bit 4.
EL1
Enables the RF Unlocked bit update. ESB2 bit 4.
FB0
Inhibits Extended Status Byte 1 SRQ generation. Primary byte bit 0.
FB1
Enables Extended Status Byte 1 SRQ generation. Primary byte bit 0.
LE0
Inhibits Lock Error SRQ generation. Primary byte bit 3.
LE1
Enables Lock Error SRQ generation. Primary byte bit 3.
LS0
Inhibits RF Locked bit update. ESB1 bit 3.
LS1
Enables RF Locked bit update. ESB1 bit 3.
MB0
Sets the enable mask byte for the Primary Status Byte.
MB1
Sets the enable mask byte for Extended Status Byte 1.
MB2
Sets the enable mask byte for Extended Status Byte 2.
OEM
Returns the Extended SRQ Mask bytes (3 binary bytes) to the controller.
OES
Returns the GPIB Status bytes (3 binary bytes) to the controller.
OSB
Returns the Primary GPIB Status byte to the controller.
PE0
Inhibits Parameter Range Error SRQ generation. Primary byte bit 4.
PE1
Enables Parameter Range Error SRQ generation. Primary byte bit 4.
SB0
Inhibits Extended Status Byte 2 SRQ generation. Primary byte bit 7.
SB1
Enables Extended Status Byte 2 SRQ generation. Primary byte bit 7.
SQ0
Disables the SRQ generation function when a Primary byte bit is set.
SQ1
Enables SRQ generation when a Primary byte bit is enabled.
UL0
Inhibits RF Unleveled SRQ generation. Primary byte bit 2.
UL1
Enables RF Unleveled SRQ generation. Primary byte bit 2.
The MG362x1A has a software mask that permits manipulation of the three status bytes over the bus that are accomplished by sending the command codes MB0, MB1, MB2, or all three at once, followed by an argument that assigns an on/off condition for each bit in the byte. A status byte example is shown in Figure: Status Byte Example.
Status Byte Example
Example:MB1\x08
MB1 should be followed by a single binary byte. This example uses the hexadecimal escape sequence "\x08" to represent a single byte with value 0x08. Enables bit 3 in extended status byte 1. Same as the LS1 command.
